This synthesiser had a combination of phase noise, spurious output and switching time specifications that could only be met with an analogue direct architecture (iterative mix and divide). Even so it was a difficult specification. The client had committed themselves to supply the unit without appreciating this.
As it was not obvious whether the spec was achievable, the first stage was a formal feasibility study. Most of this work was theoretical, however the phase noise contributed by various divider types was not well-documented. It was therefore necessary to build a phase noise test jig as part of the study. Measurement down to about -150dBc/Hz at 10kHz offset was necessary, so this was not trivial.
Having identified a suitable divider technology and manufacturer (there was significant variation between manufacturers), various architectures were considered, and their characteristics calculated and compared. It became clear that a conventional iterative mix and divide architecture would not be capable of meeting all parts of the specification simultaneously.
A novel architecture that could just meet the spec was devised. A written report was produced, explaining the tradeoffs and justifying our choice of architecture. Giastar was then awarded the contract for design and manufacture of the synthesiser.
The images show top and bottom views of the synthesiser module. Overall dimensions are about 200mm x 200mm x 20mm. There are two boards, each having components on both sides, mounted on each side of a central divider in the milled case.
Filter responses were critical in both the time and frequency domains, therefore all filters were designed from first principles, checking group delay and frequency response of the designs with our own network analysis software. The alocromed internal boxes in the top view are all filters.
The bottom view shows the four low-noise VCXOs that provided the sources for the divide and mix chain. These VCXOs were all phase-locked to an external reference, using a very low loop bandwidth and passive loop filter to avoid phase noise degradation.
Also on that board is the switching matrix for the divide/mix chain and the control logic, which was required to sweep the frequency in a predetermined pattern. The circuit board layout was extremely critical, as crosstalk between the references had to be minimised to control spurious outputs.
The synthesiser met the specifications as predicted in the feasibility study.
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